InitDevice.c

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// USER INCLUDES
#include <SI_EFM8BB1_Register_Enums.h>
#include "InitDevice.h"
 
// USER PROTOTYPES
// USER FUNCTIONS
 
// $[Library Includes]
// [Library Includes]$
 
//==============================================================================
// enter_DefaultMode_from_RESET
//==============================================================================
extern void enter_DefaultMode_from_RESET(void)
{
    // $[Config Calls]
    WDT_0_enter_DefaultMode_from_RESET();
    PORTS_0_enter_DefaultMode_from_RESET();
    PORTS_1_enter_DefaultMode_from_RESET();
    PBCFG_0_enter_DefaultMode_from_RESET();
    ADC_0_enter_DefaultMode_from_RESET();
    CMP_1_enter_DefaultMode_from_RESET();
    CLOCK_0_enter_DefaultMode_from_RESET();
    TIMER01_0_enter_DefaultMode_from_RESET();
    TIMER16_2_enter_DefaultMode_from_RESET();
    TIMER_SETUP_0_enter_DefaultMode_from_RESET();
    INTERRUPT_0_enter_DefaultMode_from_RESET();
    // [Config Calls]$
 
}
 
extern void WDT_0_enter_DefaultMode_from_RESET(void)
{
    // $[Watchdog Timer Init Variable Declarations]
    uint32_t i;
    bool ea;
    // [Watchdog Timer Init Variable Declarations]$
 
    // $[WDTCN - Watchdog Timer Control]
    // Deprecated
    // [WDTCN - Watchdog Timer Control]$
 
    // $[WDTCN_2 - Watchdog Timer Control]
 
    // Feed WDT timer before disabling (Erratum WDT_E102)
    WDTCN = 0xA5;
 
    // Add 2 LFO cycle delay before disabling WDT (Erratum WDT_E102)
    for (i = 0; i < (2 * 3062500UL) / (10000 * 3); i++)
    {
        NOP();
    }
 
    // Disable WDT before changing interval
    ea = IE_EA;
    IE_EA = 0;
    WDTCN = 0xDE;
    WDTCN = 0xAD;
    IE_EA = ea;
 
    // Delay 2 LFO cycles to ensure WDT is completely disabled
    for (i = 0; i < (2 * 3062500UL) / (10000 * 3); i++)
    {
        NOP();
    }
 
    // Change WDT interval
    WDTCN = 1;
 
    // Start WDT
    WDTCN = 0xA5;
 
    // [WDTCN_2 - Watchdog Timer Control]$
 
}
 
extern void PORTS_0_enter_DefaultMode_from_RESET(void)
{
    // $[P0 - Port 0 Pin Latch]
 
    P0 = P0_B0__LOW | P0_B1__HIGH | P0_B2__HIGH | P0_B3__LOW | P0_B4__HIGH
            | P0_B5__HIGH | P0_B6__HIGH | P0_B7__LOW;
    // [P0 - Port 0 Pin Latch]$
 
    // $[P0MDOUT - Port 0 Output Mode]
 
    P0MDOUT = P0MDOUT_B0__OPEN_DRAIN | P0MDOUT_B1__OPEN_DRAIN
            | P0MDOUT_B2__OPEN_DRAIN | P0MDOUT_B3__PUSH_PULL
            | P0MDOUT_B4__PUSH_PULL | P0MDOUT_B5__OPEN_DRAIN
            | P0MDOUT_B6__OPEN_DRAIN | P0MDOUT_B7__PUSH_PULL;
    // [P0MDOUT - Port 0 Output Mode]$
 
    // $[P0MDIN - Port 0 Input Mode]
 
    P0MDIN = P0MDIN_B0__DIGITAL | P0MDIN_B1__ANALOG | P0MDIN_B2__DIGITAL
            | P0MDIN_B3__DIGITAL | P0MDIN_B4__DIGITAL | P0MDIN_B5__DIGITAL
            | P0MDIN_B6__DIGITAL | P0MDIN_B7__DIGITAL;
    // [P0MDIN - Port 0 Input Mode]$
 
    // $[P0SKIP - Port 0 Skip]
 
    P0SKIP = P0SKIP_B0__SKIPPED | P0SKIP_B1__SKIPPED | P0SKIP_B2__SKIPPED
            | P0SKIP_B3__SKIPPED | P0SKIP_B4__NOT_SKIPPED
            | P0SKIP_B5__NOT_SKIPPED | P0SKIP_B6__SKIPPED
            | P0SKIP_B7__NOT_SKIPPED;
    // [P0SKIP - Port 0 Skip]$
 
    // $[P0MASK - Port 0 Mask]
    // [P0MASK - Port 0 Mask]$
 
    // $[P0MAT - Port 0 Match]
    // [P0MAT - Port 0 Match]$
 
}
 
extern void PBCFG_0_enter_DefaultMode_from_RESET(void)
{
    // $[XBR2 - Port I/O Crossbar 2]
 
    XBR2 = XBR2_WEAKPUD__PULL_UPS_ENABLED | XBR2_XBARE__ENABLED;
    // [XBR2 - Port I/O Crossbar 2]$
 
    // $[PRTDRV - Port Drive Strength]
    // [PRTDRV - Port Drive Strength]$
 
    // $[XBR0 - Port I/O Crossbar 0]
 
    XBR0 = XBR0_URT0E__ENABLED | XBR0_SPI0E__DISABLED | XBR0_SMB0E__DISABLED
            | XBR0_CP0E__DISABLED | XBR0_CP0AE__DISABLED | XBR0_CP1E__DISABLED
            | XBR0_CP1AE__ENABLED | XBR0_SYSCKE__DISABLED;
    // [XBR0 - Port I/O Crossbar 0]$
 
    // $[XBR1 - Port I/O Crossbar 1]
    // [XBR1 - Port I/O Crossbar 1]$
 
}
 
extern void CLOCK_0_enter_DefaultMode_from_RESET(void)
{
    // $[CLKSEL - Clock Select]
 
    CLKSEL = CLKSEL_CLKSL__HFOSC | CLKSEL_CLKDIV__SYSCLK_DIV_16;
    // [CLKSEL - Clock Select]$
 
}
 
extern void CMP_0_enter_DefaultMode_from_RESET(void)
{
    // $[CMP0MX - Comparator 0 Multiplexer Selection]
 
    uint8_t delay;
 
    CMP0MX = CMP0MX_CMXP__LDO_OUT | CMP0MX_CMXN__CMP0N1;
    // Delay to allow the comparator inputs to settle
    for (delay = 0; delay < 0x20; delay++)
        ;
    // [CMP0MX - Comparator 0 Multiplexer Selection]$
 
    // $[CMP0MD - Comparator 0 Mode]
 
    CMP0MD |= CMP0MD_CPRIE__RISE_INT_ENABLED;
    // [CMP0MD - Comparator 0 Mode]$
 
    // $[CMP0CN0 - Comparator 0 Control 0]
 
    CMP0CN0 |= CMP0CN0_CPEN__ENABLED;
    // [CMP0CN0 - Comparator 0 Control 0]$
 
}
 
extern void TIMER01_0_enter_DefaultMode_from_RESET(void)
{
    // $[Timer Initialization]
    //Save Timer Configuration
    uint8_t TCON_save;
    TCON_save = TCON;
    //Stop Timers
    TCON &= ~TCON_TR0__BMASK & ~TCON_TR1__BMASK;
 
    // [Timer Initialization]$
 
    // $[TH0 - Timer 0 High Byte]
 
    TH0 = (0x80 << TH0_TH0__SHIFT);
    // [TH0 - Timer 0 High Byte]$
 
    // $[TL0 - Timer 0 Low Byte]
 
    TL0 = (0x60 << TL0_TL0__SHIFT);
    // [TL0 - Timer 0 Low Byte]$
 
    // $[TH1 - Timer 1 High Byte]
    // [TH1 - Timer 1 High Byte]$
 
    // $[TL1 - Timer 1 Low Byte]
    // [TL1 - Timer 1 Low Byte]$
 
    // $[Timer Restoration]
    //Restore Timer Configuration
    TCON |= (TCON_save & TCON_TR0__BMASK) | (TCON_save & TCON_TR1__BMASK);
 
    // [Timer Restoration]$
 
}
 
extern void TIMER_SETUP_0_enter_DefaultMode_from_RESET(void)
{
    // $[CKCON0 - Clock Control 0]
    // [CKCON0 - Clock Control 0]$
 
    // $[TMOD - Timer 0/1 Mode]
 
    TMOD = TMOD_T0M__MODE3 | TMOD_T1M__MODE3 | TMOD_CT0__TIMER
            | TMOD_GATE0__DISABLED | TMOD_CT1__TIMER | TMOD_GATE1__DISABLED;
    // [TMOD - Timer 0/1 Mode]$
 
    // $[TCON - Timer 0/1 Control]
 
    TCON |= TCON_TR1__RUN;
    // [TCON - Timer 0/1 Control]$
 
}
 
extern void INTERRUPT_0_enter_DefaultMode_from_RESET(void)
{
    // $[EIE1 - Extended Interrupt Enable 1]
 
    EIE1 = EIE1_EADC0__ENABLED | EIE1_EWADC0__DISABLED | EIE1_ECP0__DISABLED
            | EIE1_ECP1__ENABLED | EIE1_EMAT__DISABLED | EIE1_EPCA0__DISABLED
            | EIE1_ESMB0__DISABLED | EIE1_ET3__DISABLED;
    // [EIE1 - Extended Interrupt Enable 1]$
 
    // $[EIP1 - Extended Interrupt Priority 1]
    // [EIP1 - Extended Interrupt Priority 1]$
 
    // $[IE - Interrupt Enable]
 
    IE = IE_EA__ENABLED | IE_EX0__DISABLED | IE_EX1__DISABLED
            | IE_ESPI0__DISABLED | IE_ET0__ENABLED | IE_ET1__ENABLED
            | IE_ET2__DISABLED | IE_ES0__ENABLED;
    // [IE - Interrupt Enable]$
 
    // $[IP - Interrupt Priority]
    // [IP - Interrupt Priority]$
 
}
 
extern void UART_0_enter_DefaultMode_from_RESET(void)
{
    // $[SCON0 - UART0 Serial Port Control]
 
    SCON0 |= SCON0_REN__RECEIVE_ENABLED;
    // [SCON0 - UART0 Serial Port Control]$
 
}
 
extern void ADC_0_enter_DefaultMode_from_RESET(void)
{
    // $[ADC0CN1 - ADC0 Control 1]
 
    ADC0CN1 = ADC0CN1_ADCMBE__CM_BUFFER_ENABLED;
    // [ADC0CN1 - ADC0 Control 1]$
 
    // $[ADC0MX - ADC0 Multiplexer Selection]
 
    ADC0MX = ADC0MX_ADC0MX__ADC0P11;
    // [ADC0MX - ADC0 Multiplexer Selection]$
 
    // $[ADC0CF - ADC0 Configuration]
 
    ADC0CF = (0x06 << ADC0CF_ADSC__SHIFT) | ADC0CF_AD8BE__NORMAL
            | ADC0CF_ADGN__GAIN_0P5 | ADC0CF_ADTM__TRACK_NORMAL;
    // [ADC0CF - ADC0 Configuration]$
 
    // $[ADC0AC - ADC0 Accumulator Configuration]
 
    ADC0AC = ADC0AC_ADSJST__LEFT_NO_SHIFT | ADC0AC_AD12BE__12_BIT_DISABLED
            | ADC0AC_ADAE__ACC_DISABLED | ADC0AC_ADRPT__ACC_1;
    // [ADC0AC - ADC0 Accumulator Configuration]$
 
    // $[ADC0TK - ADC0 Burst Mode Track Time]
 
    ADC0TK = ADC0TK_AD12SM__SAMPLE_FOUR | (0x22 << ADC0TK_ADTK__SHIFT);
    // [ADC0TK - ADC0 Burst Mode Track Time]$
 
    // $[ADC0PWR - ADC0 Power Control]
 
    ADC0PWR = (0x04 << ADC0PWR_ADPWR__SHIFT) | ADC0PWR_ADLPM__LP_BUFFER_ENABLED
            | ADC0PWR_ADMXLP__LP_MUX_VREF_ENABLED | ADC0PWR_ADBIAS__MODE3;
    // [ADC0PWR - ADC0 Power Control]$
 
    // $[ADC0GTH - ADC0 Greater-Than High Byte]
    // [ADC0GTH - ADC0 Greater-Than High Byte]$
 
    // $[ADC0GTL - ADC0 Greater-Than Low Byte]
    // [ADC0GTL - ADC0 Greater-Than Low Byte]$
 
    // $[ADC0LTH - ADC0 Less-Than High Byte]
    // [ADC0LTH - ADC0 Less-Than High Byte]$
 
    // $[ADC0LTL - ADC0 Less-Than Low Byte]
    // [ADC0LTL - ADC0 Less-Than Low Byte]$
 
    // $[ADC0CN0 - ADC0 Control 0]
 
    ADC0CN0 &= ~ADC0CN0_ADCM__FMASK;
    ADC0CN0 |= ADC0CN0_ADBMEN__BURST_ENABLED | ADC0CN0_ADCM__TIMER2;
    // [ADC0CN0 - ADC0 Control 0]$
 
}
 
extern void TIMER16_2_enter_DefaultMode_from_RESET(void)
{
    // $[Timer Initialization]
    // Save Timer Configuration
    uint8_t TMR2CN0_TR2_save;
    TMR2CN0_TR2_save = TMR2CN0 & TMR2CN0_TR2__BMASK;
    // Stop Timer
    TMR2CN0 &= ~(TMR2CN0_TR2__BMASK);
    // [Timer Initialization]$
 
    // $[TMR2CN0 - Timer 2 Control]
    // [TMR2CN0 - Timer 2 Control]$
 
    // $[TMR2H - Timer 2 High Byte]
 
    TMR2H = (0xE7 << TMR2H_TMR2H__SHIFT);
    // [TMR2H - Timer 2 High Byte]$
 
    // $[TMR2L - Timer 2 Low Byte]
 
    TMR2L = (0x14 << TMR2L_TMR2L__SHIFT);
    // [TMR2L - Timer 2 Low Byte]$
 
    // $[TMR2RLH - Timer 2 Reload High Byte]
 
    TMR2RLH = (0xE7 << TMR2RLH_TMR2RLH__SHIFT);
    // [TMR2RLH - Timer 2 Reload High Byte]$
 
    // $[TMR2RLL - Timer 2 Reload Low Byte]
 
    TMR2RLL = (0x14 << TMR2RLL_TMR2RLL__SHIFT);
    // [TMR2RLL - Timer 2 Reload Low Byte]$
 
    // $[TMR2CN0]
 
    TMR2CN0 |= TMR2CN0_TR2__RUN;
    // [TMR2CN0]$
 
    // $[Timer Restoration]
    // Restore Timer Configuration
    TMR2CN0 |= TMR2CN0_TR2_save;
    // [Timer Restoration]$
 
}
 
extern void PORTS_1_enter_DefaultMode_from_RESET(void)
{
    // $[P1 - Port 1 Pin Latch]
    // [P1 - Port 1 Pin Latch]$
 
    // $[P1MDOUT - Port 1 Output Mode]
    // [P1MDOUT - Port 1 Output Mode]$
 
    // $[P1MDIN - Port 1 Input Mode]
 
    P1MDIN = P1MDIN_B0__DIGITAL | P1MDIN_B1__DIGITAL | P1MDIN_B2__DIGITAL
            | P1MDIN_B3__ANALOG;
    // [P1MDIN - Port 1 Input Mode]$
 
    // $[P1SKIP - Port 1 Skip]
 
    P1SKIP = P1SKIP_B0__NOT_SKIPPED | P1SKIP_B1__SKIPPED
            | P1SKIP_B2__NOT_SKIPPED | P1SKIP_B3__SKIPPED;
    // [P1SKIP - Port 1 Skip]$
 
    // $[P1MASK - Port 1 Mask]
    // [P1MASK - Port 1 Mask]$
 
    // $[P1MAT - Port 1 Match]
    // [P1MAT - Port 1 Match]$
 
}
 
extern void CMP_1_enter_DefaultMode_from_RESET(void)
{
    // $[CMP1MX - Comparator 1 Multiplexer Selection]
 
    uint8_t delay;
 
    CMP1MX = CMP1MX_CMXP__LDO_OUT | CMP1MX_CMXN__CMP1N5;
    // Delay to allow the comparator inputs to settle
    for (delay = 0; delay < 0x20; delay++)
        ;
    // [CMP1MX - Comparator 1 Multiplexer Selection]$
 
    // $[CMP1MD - Comparator 1 Mode]
 
    CMP1MD |= CMP1MD_CPRIE__RISE_INT_ENABLED;
    // [CMP1MD - Comparator 1 Mode]$
 
    // $[CMP1CN0 - Comparator 1 Control 0]
 
    CMP1CN0 &= ~CMP1CN0_CPHYP__FMASK;
    CMP1CN0 |= CMP1CN0_CPEN__ENABLED | CMP1CN0_CPHYP__ENABLED_MODE1
            | CMP1CN0_CPHYN__ENABLED_MODE3;
    // [CMP1CN0 - Comparator 1 Control 0]$
 
}
 
extern void VREF_0_enter_DefaultMode_from_RESET(void)
{
 
}