IoT Supervisor_main.c

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//-----------------------------------------------------------------------------
// Includes
//-----------------------------------------------------------------------------
#include <hardware.h>
#include <SI_EFM8BB1_Register_Enums.h>                  // SFR declarations
#include "InitDevice.h"
#include "IoT_Supervisor.h"
#include "ModbusMiddleWare.h"
#include "PetitModbus.h"
#include "EFM8BB1_FlashPrimitives.h"
// $[Generated Includes]
// [Generated Includes]$
 
void SiLabs_Startup(void)
{
    // $[SiLabs Startup]
    // [SiLabs Startup]$
}
 
//-----------------------------------------------------------------------------
// Global Variables
//-----------------------------------------------------------------------------
volatile sv_dev_sta_t sv_dev_sta = {0};
 
// controls the main loop
volatile t1Count_t t1Count = 0;
 
// used in the timer 0 loop
volatile uint8_t t0Count = 0;
uint8_t T0C_TOP = 0;
 
 
#define HB_DIV (9u) // approximately once a second, actually less
                    // must be at least two, but it probably won't look good
                    // at two...
#define HB_DUTYCYCLE (32u) // select zero here to bypass the dutycycle gen
#define HB_SKIP (3u) // number of heartbeat cycles to skip between blinks
#define FAST_BLINK (9u) // one second
#define SLOW_BLINK (FAST_BLINK + 2u)
 
bool sys_ok = true;
bool configuring = false;
uint8_t hbdCount = 0; // heartbeat dutycycle counter
uint8_t hbsCount = 0; // heartbeat skip counter
 
void blinker(void)
{
    // sys ok is heart beat
    if (sys_ok == true && configuring == false)
    {
        // one: determine heart beat
        // t1Count & (1 << HB_DIV)
        bool hb_slow = (t1Count & (1 << HB_DIV)) != 0;
        bool hb_fast = (t1Count & (1 << HB_DIV - 2)) != 0;
        // heart beat slow _ rising edge
        bool hbs_re = (t1Count & ((1 << HB_DIV + 1) - 1)) == (1 << HB_DIV);
        // heart beat fast _ rising edge
        bool hbf_re = (t1Count & ((1 << HB_DIV - 1) - 1)) == (1 << HB_DIV - 2);
        bool hb_internal = hb_fast && hb_slow;
        if (hbs_re == true && hbsCount < HB_SKIP)
        {
            hbsCount++;
        }
        else if (hbs_re == true)
        {
            hbsCount = 0;
        }
        // compute heartbeat skip
        hb_internal = hb_internal && (hbsCount == 0);
 
        // two: LED duty cycle limiter
        if (hb_internal == true && hbf_re == true)
        {
            hbdCount = 1;
            nPWR_LED = 0;
        }
 
        // if the selected dutycycle is 0, base this part
        // off of the heatbeat generated before
        if (hbdCount < HB_DUTYCYCLE)
        {
            hbdCount++;
        }
        else if (HB_DUTYCYCLE > 0u || hb_internal == false)
        {
            nPWR_LED = 1;
        }
    }
    // sys not ok is short blink
    else if (configuring == false) // sys_ok == false
    {
        nPWR_LED = !(t1Count & (1 << FAST_BLINK));
    }
    // configuring is long blink
    else // configuring == true
    {
        nPWR_LED = !((t1Count & (1 << SLOW_BLINK)));
    }
}
 
// == outputs ==
bool nReset = false; // inverse logic
bool modbusWdtSmEn = false;
// == inputs ==
// comparator input flag
bool cprif = false; // set outside, cleared here
// modbus watchdog expired
bool modbusWdtExp = false; // set outside, cleared in this SM
 
// == constants ==
#define SCOUNTER_ONE_SECOND (125)
// 125 for one second
void VinSm(void)
{
    // static variables
    static uint8_t sCounter = 0;
 
    // determine input state
    bool VinCmp = VIN_CMP_CPOUT();
 
    // default output states
    nReset = false;
    modbusWdtSmEn = false;
 
    // transitions
    switch (sv_dev_sta.v.vinSmS)
    {
    case eVIN_Init:
        if (cprif == true || VinCmp == true)
        {
            sv_dev_sta.v.vinSmS = eVIN_VLow;
        }
        else if (sCounter >= SCOUNTER_ONE_SECOND * 2 - 1)
        {
            sv_dev_sta.v.vinSmS = eVIN_OK;
        }
        break;
    case eVIN_VLow:
        if (VinCmp == false)
        {
            sv_dev_sta.v.vinSmS = eVIN_Init;
        }
        break;
    case eVIN_OK:
        if (cprif == true || VinCmp == true)
        {
            sv_dev_sta.v.vinSmS = eVIN_VLow;
            sv_dev_sta.v.lastRstS = eLR_VSM;
        }
        else if (modbusWdtExp == true)
        {
            sv_dev_sta.v.vinSmS = eVIN_VLow;
            sv_dev_sta.v.lastRstS = eLR_WDT;
        }
        break;
    default:
        sv_dev_sta.v.vinSmS = eVIN_VLow;
        break;
    }
 
    // outputs
    switch (sv_dev_sta.v.vinSmS)
    {
    case eVIN_Init:
        sCounter++;
        modbusWdtExp = false;
        break;
    case eVIN_VLow:
        sCounter = 0;
        sys_ok = false;
        break;
    case eVIN_OK:
        nReset = true;
        modbusWdtSmEn = true;
        sCounter = 0;
        break;
    }
 
    // output signals
    RESET_P = nReset;
    RESET_LED_SET(nReset);
 
    // reset flags
    cprif = false;
}
 
#define C_DEFAULT_MB_WD_TIMEOUT (15)
#define C_MB_WD_COUNT2MIN (7500)
 
uint8_t MB_WD_TIMEOUT = C_DEFAULT_MB_WD_TIMEOUT;
bool mbWDTen = false;
bool mbWDTpet = false;
 
void mbWDTsm(void)
{
    // statics
    static uint16_t mbWDTc = 0;     // modbus watchdog timer counter
    static uint16_t mbWDTcM = 0;    // modbus watchdog timer counter (minute)
 
    // transitions
    switch (sv_dev_sta.v.wdtSmS)
    {
    case eMW_Ini:
        if (mbWDTen && modbusWdtSmEn)
            sv_dev_sta.v.wdtSmS = eMW_En;
        break;
    case eMW_En:
        if (!mbWDTen || mbWDTpet)
            sv_dev_sta.v.wdtSmS = eMW_Ini;
        if (mbWDTcM >= MB_WD_TIMEOUT)
            sv_dev_sta.v.wdtSmS = eMW_Timeout;
        break;
    case eMW_Timeout:
        sv_dev_sta.v.wdtSmS = eMW_Ini;
        break;
    default:
        sv_dev_sta.v.wdtSmS = eMW_Ini;
        break;
    }
 
    // output
    switch (sv_dev_sta.v.wdtSmS)
    {
    case eMW_Ini:
        mbWDTc = 0;
        mbWDTcM = 0;
        break;
    case eMW_En:
        mbWDTc++;
        if (mbWDTc >= C_MB_WD_COUNT2MIN)
        {
            mbWDTcM++;
            mbWDTc = 0;
        }
        break;
    case eMW_Timeout:
        mbWDTen = false;
        modbusWdtExp = true;
        break;
    }
 
    // inverse logic
    WDT_LED_SET(sv_dev_sta.v.wdtSmS == eMW_En);
 
    mbWDTpet = false;
}
 
#define C_FLASH_CONF (0x1E00)
#define pFLASH_CONF ((uint8_t code*)C_FLASH_CONF)
#define C_PW_DEFAULT (0xDEFA)
// manually determined program memory end.
#if defined(DEBUG) && DEBUG
#define C_FOUND_PROG_END (0x101F) // end of program memory to check (exclusive)
#else
#define C_FOUND_PROG_END (0x12A9) // determine me
#endif
 
// configuration variables
code const uint8_t ex_cfg_header[] =
{
    'M','A','G',    // Makers, Artists, and Gadgeteers Laboratory
    'S','V',        // IoT Supervisor
    '0',            // sw major
    '0',            // sw minor
    '0'             // header version
};
#define C_CFG_HEADER_LEN (sizeof(ex_cfg_header))
code const cfg_t default_cfg =
{
    255, // sid, the default is 255
    eMMW_B_38400, // baud
    C_DEFAULT_MB_WD_TIMEOUT, // fifteen minutes
    C_PW_DEFAULT
};
#define C_CFG_DATA_LEN (sizeof(cfg_t))
#define C_CFG_C_CRC_LEN (2)
#define C_CFG_P_CRC_LEN (2)
#define C_CFG_DATA_END (C_CFG_HEADER_LEN + C_CFG_DATA_LEN)
#define C_CFG_C_CRC_END (C_CFG_DATA_END + C_CFG_C_CRC_LEN)
#define C_CFG_P_CRC_END (C_CFG_C_CRC_END + C_CFG_P_CRC_LEN)
 
CfgSM_t cfgSmS = eCFG_Load;
bool pw_flag = false;
bool dir_tx = false;
bool run_petitmodbus = false;
uint16_t pw; 
cfg_t cfg;
uint8_t cfg_write_idx = 0;
uint16_t calc_cfg_crc = 0xFFFF;
uint16_t calc_prog_crc = 0xFFFF;
 
bool ccfg_check(void)
{
    uint8_t i = 0;
    calc_cfg_crc = 0xFFFF;
    // check header
    for (i = 0; i < C_CFG_HEADER_LEN; i++)
    {
        if (*(pFLASH_CONF + i) != ex_cfg_header[i])
        {
            sv_dev_sta.v.verifSt = eVS_Setup;
            return false;
        }
        KirisakiCRC16Calc(ex_cfg_header[i], &calc_cfg_crc);
    }
 
    // check contents
    // modbus SID
    i = *(pFLASH_CONF + C_CFG_HEADER_LEN);
    if(i < C_SID_MIN || i > C_SID_MAX)
    {
        sv_dev_sta.v.verifSt = eVS_Cfg;
        return false;
    }
    else
    {
        cfg.sid = i;
        KirisakiCRC16Calc(i, &calc_cfg_crc);
    }
    // modbus baud config
    i = *(pFLASH_CONF + C_CFG_HEADER_LEN + 1);
    if (i == 0 || i >= eMMW_B_NUM)
    {
        sv_dev_sta.v.verifSt = eVS_Cfg;
        return false;
    }
    else
    {
        cfg.baud = i;
        KirisakiCRC16Calc(i, &calc_cfg_crc);
    }
    // modbus WD timeout
    i = *(pFLASH_CONF + C_CFG_HEADER_LEN + 2);
    if (i == 0)
    {
        sv_dev_sta.v.verifSt = eVS_Cfg;
        return false;
    }
    else
    {
        cfg.wdto = i;
        KirisakiCRC16Calc(i, &calc_cfg_crc);
    }
    // password
    i = *(pFLASH_CONF + C_CFG_HEADER_LEN + 3);
    cfg.pw = i;
    KirisakiCRC16Calc(i, &calc_cfg_crc);
    i = *(pFLASH_CONF + C_CFG_HEADER_LEN + 4);
    cfg.pw |= (uint16_t)i << 8;
    KirisakiCRC16Calc(i, &calc_cfg_crc);
    if (cfg.pw == C_CMD_COMMIT || cfg.pw == C_CMD_CANCEL)
    {
        sv_dev_sta.v.verifSt = eVS_Cfg;
        return false;
    }
    // check CFG CRC
    i = *(pFLASH_CONF + C_CFG_DATA_END);
    if ((calc_cfg_crc & 0xFF) != i)
    {
        sv_dev_sta.v.verifSt = eVS_Cfg;
        return false;
    }
    else
    {
        i = *(pFLASH_CONF + C_CFG_DATA_END + 1);
        if (calc_cfg_crc >> 8 != i)
        {
            sv_dev_sta.v.verifSt = eVS_Cfg;
            return false;
        }
    }
    return true;
}
 
bool dcfg_check()
{
    // check SID
    if (cfg.sid < C_SID_MIN || cfg.sid > C_SID_MAX)
    {
        return false;
    }
    // check baud enum (no parity)
    if (cfg.baud < 1 || cfg.baud >= eMMW_B_NUM)
    {
        return false;
    }
    // check wdt timeout
    if (cfg.wdto < 1)
    {
        return false;
    }
    // check password
    if (cfg.pw == C_CMD_COMMIT || cfg.pw == C_CMD_CANCEL)
    {
        return false;
    }
    return true;
}
 
 
void cfg_load()
{
    uint8_t code* addr;
    uint8_t i = 0;
    bool cfg_ok = true;
 
    cfg_ok = ccfg_check();
 
    // calculate PROG CRC
    // this is set to run even if the CRC is not checked in order to ensure
    // a valid startup time for debugging is achieved
    calc_prog_crc = 0xFFFF;
    for (addr = 0; addr < C_FOUND_PROG_END; addr++)
    {
        KirisakiCRC16Calc(*addr, &calc_prog_crc);
    }
 
    // check PROG CRC
    if (sv_dev_sta.v.verifSt != eVS_Setup)
    {
        i = *(pFLASH_CONF + C_CFG_C_CRC_END);
        // check low byte
        if ((calc_prog_crc & 0xFF) != i)
        {
            sv_dev_sta.v.verifSt = eVS_Prog;
            sys_ok = false;
        }
        else
        {
            // check high byte
            i = *(pFLASH_CONF + C_CFG_C_CRC_END + 1);
            if (calc_prog_crc >> 8 != i)
            {
                sv_dev_sta.v.verifSt = eVS_Prog;
                sys_ok = false;
            }
        }
    }
 
    if (cfg_ok == false)
    {
        // load the default configuration structure
        cfg.sid = default_cfg.sid;
        cfg.baud = default_cfg.baud;
        cfg.wdto = default_cfg.wdto;
        cfg.pw = default_cfg.pw;
        sys_ok = false;
    }
 
    // apply configuration structure
    mmw_init(cfg.sid, cfg.baud);
    MB_WD_TIMEOUT = cfg.wdto;
 
    cfgSmS = eCFG_Idle;
}
 
void cfg_write(void)
{
    calc_cfg_crc = 0xFFFF;
    for (cfg_write_idx = 0; cfg_write_idx < C_CFG_HEADER_LEN; cfg_write_idx++)
    {
        FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx,
                ex_cfg_header[cfg_write_idx]);
        KirisakiCRC16Calc(ex_cfg_header[cfg_write_idx], &calc_cfg_crc);
    }
    // sid
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, cfg.sid);
    KirisakiCRC16Calc(cfg.sid, &calc_cfg_crc);
    // baud
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, cfg.baud);
    KirisakiCRC16Calc(cfg.baud, &calc_cfg_crc);
    // wdt top
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, cfg.wdto);
    KirisakiCRC16Calc(cfg.wdto, &calc_cfg_crc);
    // pw
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, cfg.pw & 0xFF);
    KirisakiCRC16Calc(cfg.pw & 0xFF, &calc_cfg_crc);
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, cfg.pw >> 8);
    KirisakiCRC16Calc(cfg.pw >> 8, &calc_cfg_crc);
    // cfg crc
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, calc_cfg_crc & 0xFF);
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, calc_cfg_crc >> 8);
    // prog crc
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, calc_prog_crc & 0xFF);
    FLASH_ByteWrite(C_FLASH_CONF + cfg_write_idx++, calc_prog_crc >> 8);
 
    // reset to complete
    RSTSRC |= RSTSRC_SWRSF__SET;
    // uh, set the state machine to idle in case we have not reset
    cfgSmS = eCFG_Idle;
}
 
void CFGsm()
{
    // transitions
    switch (cfgSmS)
    {
    case eCFG_Load:
        // transitions handled in-function
        break;
    case eCFG_Idle:
        if (pw_flag)
        {
            if (pw == cfg.pw)
            {
                cfgSmS = eCFG_Cache;
                configuring = true;
            }
            pw_flag = false;
        }
        break;
    case eCFG_Cache:
        if (pw_flag && Petit_RxTx_State == PETIT_RXTX_RX && dir_tx == false)
        {
            if (pw == C_CMD_COMMIT)
            {
                if (dcfg_check())
                {
                    cfgSmS = eCFG_Commit;
                    mmw_init(cfg.sid, cfg.baud);
                    MB_WD_TIMEOUT = cfg.wdto;
                }
            }
            if (pw == C_CMD_CANCEL)
            {
                cfgSmS = eCFG_Idle;
                cfg = default_cfg;
                configuring = false;
            }
            pw_flag = false;
        }
        break;
    case eCFG_Commit:
        if (pw_flag && Petit_RxTx_State == PETIT_RXTX_RX && dir_tx == false)
        {
            if (pw == cfg.pw)
            {
                cfgSmS = eCFG_Erase;
            }
            if (pw == C_CMD_CANCEL)
            {
                cfgSmS = eCFG_Idle;
                configuring = false;
            }
            pw_flag = false;
        }
        break;
    case eCFG_Erase:
            cfgSmS = eCFG_Write;
        break;
    case eCFG_Write:
        // transitions handled in function
        break;
    default:
        cfgSmS = eCFG_Idle;
        break;
    }
 
    // outputs
    switch (cfgSmS)
    {
    case eCFG_Load:
        cfg_load();
        run_petitmodbus = false;
        break;
    case eCFG_Idle:
        run_petitmodbus = true;
        break;
    case eCFG_Cache:
        run_petitmodbus = true;
        mbWDTen = false;
        // the magic in processing actually happens in the modbus rx function
        break;
    case eCFG_Commit:
        run_petitmodbus = true;
        // functionality implemented in the transitions, believe it or not
        break;
    case eCFG_Erase:
        run_petitmodbus = false;
        FLASH_PageErase(C_FLASH_CONF);
        break;
    case eCFG_Write:
        run_petitmodbus = false;
        cfg_write();
        break;
    }
}
 
 
int main(void)
{
    static t1Count_t t1CountLast = 0;
    // reset handling code
    //   skip startup reset if a software reset was called
    if ((RSTSRC & RSTSRC_SWRSF__BMASK) == RSTSRC_SWRSF__SET)
    {
        sv_dev_sta.v.vinSmS = eVIN_OK;
    }
    // Call hardware initialization routine
    enter_DefaultMode_from_RESET();
#if defined(DEBUG) && DEBUG
    // enter debugmode to get the pins working
    enter_DebugMode_from_DefaultMode();
#endif
    while (1)
    {
        // apparently, casting this to unsigned is necessary
        if (t1Count - t1CountLast >= 1u)
        {
            PETIT_PROCESS_ON();
            CFGsm();
            blinker();
            if (run_petitmodbus)
            {
                t1CountLast++;
                ProcessPetitModbus();
            }
            else
            {
                t1CountLast = t1Count;
            }
            PETIT_PROCESS_OFF();
        }
 
        //     idle mode taken out because of some race condition that keeps
        // being reached.
 
        // $[Generated Run-time code]
        // [Generated Run-time code]$
    }
    // this return should never be reached
}